In a semiconductor device in which electrodes are interconnected by cross-overs or air bridges, the configuration of the electrode connecting region usually influences the chip (cell) size. FIG. 2 shows schematically the structure of a prior art GaAs MESFET.
In FIG. 2, reference numeral 1 designates one of two depicted source electrode leads that are spaced apart from each other and disposed on the main surface of semiconductor substrate 6. A plurality of source electrodes 2 are disposed on substrate 6 spaced from each other by the channel regions of the MESFET. A gate electrode 7 having a pad portion 5 located between the source leads 1 and a linear portion 8 generally perpendicular to source electrodes 2 is disposed on the substrate 6. Reference numeral 4 designates a drain electrode having drain fingers 4a which are located generally parallel to the source electrodes 2 on the same surface of the substrate 6. One of the drain fingers 4a is arranged opposite the pad portion 5 of the gate electrode 7. A gate element portion 5a which is electrically connected with a linear portion of the gate electrode 7 is disposed on the channel between the source electrode 2 and the drain finger 4a.
Herein, each source electrode 2 is connected with a source lead electrode 1 by an electrically insulating cross-over such as air bridge. In this example a connection portion 3 between each of the source electrodes 2 and one of the source leads 1 is produced along the shortest straight line between them.
In the device of FIG. 2, the relationships between the widths, lengths and distances between the respective electrodes 2, 4, 4a, 5 and 5a are determined for efficiency and reliability. In the described structure, the width of the drain finger 4a confronting the electrode pad 5 of the gate electrode 7 is unavoidably wider than that of the other drain fingers 4a.
In the prior art electrode arrangement, the width of the drain finger 4a confronting the electrode pad 5 of the gate electrode 7 reduces the integration density where a plurality of cells, i.e., MESFETS, are included in a chip, such as in a high power output element, increasing. The increased chip size in turn results in a reduction in gain due to phase shifting of a high frequency signal.